Semiconductor devices include metal layers that are insulated from each other by dielectric layers. As device features shrink, reducing the distance between the metal layers and between metal lines on each layer increases capacitance. To address this problem, insulating materials that have a relatively low dielectric constant k are being used. Carbon doped oxide (CDO) is one such example of a dielectric film having a low k value.
CDO film is typically applied in a deposition process outlined in FIG. 1. The deposition process is typically performed within a reactor such as a chemical vapor deposition (CVD) apparatus or chamber. The deposition process begins with setting gas flows and time spacings of the gas flows in operation 110. The CVD chamber walls are cleaned in operation 112 using a first cleaning plasma. A second cleaning plasma is then struck in operation 114 to clean the CVD spindle which is used for mounting wafers. Next, the CVD chamber is purged of all gasses in operation 116. Operations 110, 112, 114, and 116 comprise a set of operations known as a pre-clean phase.
Following the pre-clean phase, gas flows, temperature, and time spacings are set in operation 120. Radio frequency (RF) power is applied in operation 122 for 20 seconds to energize the gas mixture set in operation 120 for deposition. The RF power applied in operation 122, however, is only at half power. Full RF power is not applied until operation 124. Similar to operation 122, operation 124 is performed for 20 seconds. CDO is then deposited on a wafer for 45 seconds in operation 126. Because operations 122 and 124 are performed prior to deposition in operation 126, they are known as pre-deposition operations. Finally, the CVD chamber is purged of all gasses in operation 128. Operations 120, 122, 124, 126, and 128 comprise a set of operations known as a deposition phase.
Following the deposition phase, gas flows and time spacings are again set in operation 130. The CVD chamber walls are cleaned in operation 132 using the first cleaning plasma. The second cleaning plasma is then applied in operation 134 to clean the CVD spindle which is used for mounting wafers. Next, the CVD chamber is purged of all gasses in operation 136. Operations 130, 132, 134, and 136 comprise a set of operations known as a post-clean phase.
If no other wafer is to be processed as determined in operation 140, the deposition process is terminated in operation 145. Otherwise, the process returns to the deposition phase.
One or two wafers (dummies) are typically run before the chamber reaches optimum conditions every time the CDO deposition process is initiated. Less than optimal chamber conditions result in poor dielectric thickness uniformity. As a result, dummy wafers are typically used for production. Therefore, a CDO deposition process that helps to eliminate dummy wafer processing and improve dielectric thickness uniformity and throughput is desired.